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View in your browser <https://link.globalspec.com/view/6216342320ea001fa6c4=
52behctu2.1ijr/125d5e0a>

Out-of-the-Box HPC Physical Design Implementation
is Now Open

Enter Here! <https://link.globalspec.com/click/29152010.70695/aHR0cHM6Ly93d=
3cuZ2xvYmFsc3BlYy5jb20vY2xpY2svZ28yZXZlbnQ_dHlwZT1sYXVuY2gmZXZlbnRJZD0zOTU2=
JmV2dHNyYz1TaWVtZW5zSW5kdXN0cnlTb2Z0d18yMjA5MjZfTk8mdWlkPTM1MzUwMSZ1aD00ZjU=
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b6f61c>
Monday, September 26, 2022 11:00 AM EDT / 8:00 AM PDT
What to Expect
In this webinar you will learn: =E2=80=A2 How the detail-route=E2=80=93cent=
ric architecture of Siemens=E2=80=99 Aprisa digital implementation design s=
olution makes it possible to derive the push-and-pull offsets during place =
optimization and effectively realize them during route optimization =E2=80=
=A2 How Aprisa=E2=80=99s comprised patented technologies correlate with the=
 static timing analysis (STA) and design rule checking (DRC) signoff tools,=
 allowing designers to adopt the flow very quickly for their advanced node =
designs =E2=80=A2 A case study for HPC implemented through Aprisa at an adv=
anced process node, as well as how the above technologies help achieve the =
desired frequency target
SPONSORED BY

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Janet Attar,
Product Marketing Manager, Aprisa,
Siemens EDA
About Siemens
The pace of innovation in electronics is constantly accelerating. To enable=
 customers to deliver life-changing innovations faster and become market le=
aders, we are committed to delivering the world=E2=80=99s most comprehensiv=
e portfolio of electronic design automation (EDA) software, hardware, and s=
ervices.

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<font face="'Open Sans', Arial, sans-serif">
<span style="font-size:34px; font-weight:600">Out-of-the-Box HPC Physical Design Implementation</span>
</font><br />
<font face="'Open Sans', Arial, sans-serif">
<p style="font-size:20px; padding:0px; margin:10px 0px 0px 0px">is Now Open</p>
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<a href="https://link.globalspec.com/click/29152010.70695/aHR0cHM6Ly93d3cuZ2xvYmFsc3BlYy5jb20vY2xpY2svZ28yZXZlbnQ_dHlwZT1sYXVuY2gmZXZlbnRJZD0zOTU2JmV2dHNyYz1TaWVtZW5zSW5kdXN0cnlTb2Z0d18yMjA5MjZfTk8mdWlkPTM1MzUwMSZ1aD00ZjU3NWEmbWQ9MjIwOTI2Jm1oPTlEQUVDNyZjaWQ9d2ViaW5hcg/6216342320ea001fa6c452beBe8b6f61c" style="color:#FFFFFF; text-decoration:none;">
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<span style="font-weight:bold; font-size:16px"><font face="'Open Sans', Arial, sans-serif"><br />Monday, September 26, 2022</font></span>
<br>
<font face="'Open Sans', Arial, sans-serif">11:00 AM EDT / 8:00 AM PDT</font>
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<font face="'Open Sans', Arial, sans-serif">
In this webinar you will learn:<br>
<br>
&bull; How the detail-route&ndash;centric architecture of Siemens&rsquo; Aprisa digital implementation design solution makes it possible to derive the push-and-pull offsets during place optimization and effectively realize them during route optimization<br><br>
&bull; How Aprisa&rsquo;s comprised patented technologies correlate with the static timing analysis (STA) and design rule checking (DRC) signoff tools, allowing designers to adopt the flow very quickly for their advanced node designs<br><br>
&bull; A case study for HPC implemented through Aprisa at an advanced process node, as well as how the above technologies help achieve the desired frequency target
</font>



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<p style="Margin:0px 0px 5px 0px"><font face="'Open Sans', Arial, sans-serif"><span style="font-size:13px;">SPONSORED BY</span></font></p>
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<font font face="'Open Sans', Arial, sans-serif"><strong>
Janet Attar</strong>,<br />Product Marketing Manager, Aprisa,<br />Siemens EDA</font>
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<font face="'Open Sans', Arial, sans-serif"><span style="font-size:13px;">The pace of innovation in electronics is constantly accelerating. To enable customers to deliver life-changing innovations faster and become market leaders, we are committed to delivering the world&rsquo;s most comprehensive portfolio of electronic design automation (EDA) software, hardware, and services.</span></font>
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